Silicon Labs /MGM210P032JIA /FRC_NS /FECCTRL

Block Coder Whitener Mode

0 (DIRECT): The input data is passed directly to the output without any other operations.

1 (WHITE): Data is whitened in TX and de-whitened in RX with the whitener feedback register updated every bit period.

2 (BYTEWHITE): Data is whitened in TX and de-whitened in RX with the whitener feedback register updated every byte period, recommended only for compatibility purposes.

3 (INTERLEAVEDWHITE0): Data is whitened in TX after symbol interleaving and de-whitened in RX before symbol de-interleaving.

4 (INTERLEAVEDWHITE1): Data is whitened in TX after symbol interleaving and de-whitened in RX before symbol de-interleaving. The first 16 (if INTERLEAVEWIDTH is 0) or 32 (if INTERLEAVEWIDTH is 1) RF symbols are not whitened or de-whitened.

5 (BLOCKCODEINSERT): Parity bits are added in TX and checked and removed in RX to perform block coding forward error correction (FEC). In transmit mode, the block encoder will insert parity bits between the bit stream provided from the transmit buffer. In receive mode, the block decoder will remove parity bits and they will not further be provided to the receive buffer.

6 (BLOCKCODEREPLACE): Parity bits are added in TX and checked and removed in RX to perform block coding forward error correction (FEC). In transmit mode, the block encoder will replace bits provided by the transmit buffer with parity bits. In receive mode, the block decoder will output both data bits and parity bits to the receive buffer.

7 (BLOCKLOOKUP): A lookup table is used to implement table lookup block coding in TX, and table lookup block decoding in RX.

Convolutional Encoder / Decoder mode.

0 (DISABLE): Convolutional encoding / decoding is disabled

1 (CONVOLUTIONAL): Normal convolutional encoding / decoding is enabled

2 (REPEAT): Repeat-mode convolutional encoding / decoding is enabled

Convolutional decoding mode setting.

0 (SOFT): Use soft decision convolutional decoding, recommended in most cases.

1 (HARD): Use hard decision convolutional decoding.

Convolutional traceback disabling

0 (X0): Traceback history is enabled, and convolutional decoding will use RAM to store state information. In receive mode, output from convolutional decoding will be generated after the traceback history has reached a certain level.

1 (X1): Traceback history is disabled, and convolutional decoding will not use RAM to store state information. No trellis termination sequence will be automatically appended to the transmit data. In receive mode, output from convolutional decoding will be generated after every state transition. This will not provide any convolutional decoding gain, but can be used to decode very simple codes without using any RAM memory.

Convolutional code symbol inversion

Interleaver mode.

0 (DISABLE): Interleaving is disabled

1 (ENABLE): Interleaving is enabled

2 (RXBUFFER): No symbol interleaving is performed, but the interleaver data storage is used as a data buffer in receive mode. This may, for instance, be used for receiver pause functionality.

3 (RXTXBUFFER): No symbol interleaving is performed, but the interleaver data storage is used as a data buffer in receive and transmit mode. This may, for instance, be used for receiver and transmitter pause functionality.

4-bit index of the first interleaver

Interleave symbol width.

0 (ONE): Each interleaver element consists of one RF symbol

1 (TWO): Each interleaver element consists of two RF symbols

Convolutional decoding bus lock

Enable trellis termination for subframes

0 (X0): Trellis termination is applied at the end of the frame.

1 (X1): Trellis termination is applied at the end of each subframe and at the end of the frame.

Single block code per frame

Force use of 2-FSK

Enable convolutional decoding hard error

0 (X0): Convolutional hard error decoding is disabled.

1 (X1): Convolutional hard error decoding is enabled.